Chip Design Jobs in San Francisco

Jobs › United States › San Francisco › Chip Design

Updated September 24, 2026. Newest first, straight from company career pages.

Chip design roles for ASIC, FPGA, RTL, VLSI, physical design, verification and analog design engineers.

• FPGA Associate (Winter 2027)Astranis · San Francisco · Sep 23, 2026 · via Greenhouse
• FPGA Associate (Summer 2027)Astranis · San Francisco · Sep 23, 2026 · via Greenhouse
• FPGA Intern (Summer 2027)Astranis · San Francisco · Sep 23, 2026 · via Greenhouse
• FPGA Intern (Winter 2027)Astranis · San Francisco · Sep 23, 2026 · via Greenhouse
• Physical Design Engineeropenai · San Francisco · Sep 15, 2026 · via Ashby
• Member Experience Manager - Silicon Valleyindustrious · San Francisco - 950 Tower Lane (Silicon Valley) · On-site · Sep 14, 2026 · via Ashby
• Research Engineer, AI for Chip Designopenai · San Francisco · Remote · Sep 11, 2026 · via Ashby
• NVIDIA, OEM & Chip Providers Leadbaseten · San Francisco · Remote · Sep 10, 2026 · via Ashby
• Physical Design Engineer, Forward Deployed Engineeringopenai · San Francisco · Remote · Sep 9, 2026 · via Ashby
• Software Engineer, AI for Chip Designopenai · San Francisco · Remote · Sep 8, 2026 · via Ashby
• Systems Software Engineer, Silicon Bringupopenai · San Francisco · Remote · Aug 24, 2026 · via Ashby
• ASIC Package SI/PI Engineeropenai · San Francisco · Remote · Aug 19, 2026 · via Ashby
• Silicon ArchitectŌura · Hybrid - San Francisco · Hybrid · Aug 10, 2026 · via Greenhouse
• Software Engineer, Silicon Design Methodologyopenai · San Francisco · Remote · Aug 6, 2026 · via Ashby
• Technical Program Manager, SiliconAnthropic · San Francisco · Aug 6, 2026 · via Greenhouse
• Silicon EngineerAnthropic · San Francisco · Aug 5, 2026 · via Greenhouse
• Digital Verification EngineerNeuralink · South San Francisco · Aug 4, 2026 · via Greenhouse
• Research Engineer, Chip Design RL (Reinforcement Learning)Anthropic · San Francisco · Jul 13, 2026 · via Greenhouse
• Technical Program Manager, Custom Silicon Developmentopenai · San Francisco · Remote · Jul 10, 2026 · via Ashby
• RTL Design Engineer - Interconnect & Network Datapathopenai · San Francisco · Remote · Jun 23, 2026 · via Ashby
• Sourcing Manager, Silicon/EE ComponentsŌura · Hybrid - San Francisco · Hybrid · May 21, 2026 · via Greenhouse
• Software Engineer, ASICNeuralink · South San Francisco · May 21, 2026 · via Greenhouse
• SOC Architectopenai · San Francisco · Apr 22, 2026 · via Ashby
• ASIC Firmware Engineer, Modelingopenai · San Francisco · Feb 3, 2026 · via Ashby
• Design Verification Engineeropenai · San Francisco · Remote · Oct 29, 2025 · via Ashby

Chip Design jobs in the United States →
Chip Design jobs remote in the United States →
Chip Design jobs in Austin →

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